THE VLSI IMPLEMENTATION OF HIGH THROUGHPUT LOW POWER DESIGN OF PIPELINE CELLULAR ARRAY
Virtual: https://events.vtools.ieee.org/m/336914The VLSI Implementation of High Throughput Low Power Design Of Pipeline Cellular Array. There has been increasing interest in the design of array processors for the last several years. The array processors require adders and subtractors as the hardware instead of software routines. There have been several research papers in the literature on the design ...